Back to ProjectsStart with GitHub
CORE-V MCU DevKit contains the hardware-design artifacts for an evaluation board built around CORE-V MCU and the CV32E40P v1.0.0 core. The board combines a QuickLogic ArcticPro2 embedded FPGA, flash, on-board JTAG/debug, expansion and sensor interfaces, camera support, and AWS IoT ExpressLink connectivity; the repository provides KiCad sources and schematics rather than processor RTL. It is most useful to board designers and bring-up engineers who need a concrete hardware platform for the CORE-V MCU ecosystem.
Start here
Category: SoC & SubsystemStatus: Editorial · CompletedBest for: Student
At a glance
- Purpose: evaluation platform for CV32E40P v1.0.0 within CORE-V MCU
- Design files: KiCad schematics and PCB data, project-specific parts, documentation images, and a PDF schematic
- On-board compute: CORE-V MCU plus a QuickLogic ArcticPro2 embedded FPGA
- Bring-up interfaces: on-board and external JTAG, test pins, mikroBUS, CSI camera, LEDs, button, and AWS IoT ExpressLink
- Electrical constraint: the MCU pad ring and direct JTAG header use 1.8 V logic
- Availability boundary: this repository provides board-design files and documentation, not a guarantee of current board stock or ordering availability
Further resources
18stars
8forks
HTMLrepository language (GitHub)
Categories
SoC & SubsystemTools & SDKs
Tags
OpenHWRISC-VSoCToolsDevKitBoard SupportHardwareBoardSDKGetting Started
Suitable For
StudentEngineer
Contribution ActivityLow Activity
4
Contributors
1
Open Issues
0
Recent Commits (4 weeks)
0
Open PRs
Data as of Sep 28, 2026
Verified adoption, contributor and lineage records, educational use, presentations, articles, and ecosystem data will be added incrementally from named sources.
Related Projects
CORE-V MCU
CORE-V MCU is a standalone microcontroller-class SoC platform built around CV32E40P and derived from PULPissimo. The repository combines processor integration, memories, peripherals, FPGA targets, simulation flows, and JTAG debug into a complete system rather than providing another CPU core. It is a useful reference for engineers who want to see how a CORE-V core is assembled into an ASIC- or FPGA-oriented MCU, with Nexys A7 and Genesys 2 paths available for hands-on bring-up.
CORE-V SDK
CORE-V SDK is a packaged IDE and quick-start environment for importing, building, and debugging CORE-V sample applications. It brings together GDB/OpenOCD or QEMU launch configurations, register views, an integrated terminal, and FreeRTOS-aware task and queue inspection. The project is now inactive and its documented host matrix is limited to older x86 Windows and Linux versions with no Arm-host support, so it is best used to reproduce its original workflow rather than as the default SDK for a new project.